Issue 161206.1: Clarify placement of register pieces
Section 220.127.116.11, pg 42
The current definition of the placement of a DW_OP_bit_piece within a
If the location is a register, the offset is from the
least significant bit end of the register.
This is ambiguous and may not be appropriate in some cases:
1. The term "least significant bit end" is not defined, and there are
cases where its definition is not obvious, particularly on
big-endian platforms. For instance, consider vector- or
floating-point registers. (An attempt for defining a register's
least significant bit might look like this: "The least significant
bit of the first/last byte in the register's natural memory
representation, on little-/big-endian platforms, respectively.")
2. The definition does not allow for widening a register set beyond
each of its registers' "least significant bit", such as it occurred
with z/Architecture when the FP registers were expanded to vector
3. Assuming that DW_OP_piece is just an abbreviation for a
DW_OP_bit_piece operation with offset zero, this would preclude the
use of DW_OP_piece for cases like single-precision FP values in a
double-precision FP register on big-endian platforms.
One way of clearing this up would be to leave the placement to the
ABI. This would also reduce the need for a more formal definition of
the terms "register", "natural memory representation", "least
significant bit end", etc.
E.g., change the definition to the following:
If the location is a register, the placement of the piece
within that register for the given size and offset is
defined by the ABI.
Rejected - 2/2/2017
1. Least significant bit is well defined for registers and values,
and is not dependent on the endianity of the memory representation
for these values. Some architectures allow a value to be stored
in either big- or little-endian format; this does not alter the
representation in the registers.
2. "Widening a register" is a concept out of the scope of the
DWARF Specification. This appears to be a Quality of Implementation
3. How a value is loaded into the register (perhaps by loading a
single-precision FP value into a double-precision FP register as
mentioned) does not change the register format, nor does it change
the interpretation of DW_OP_piece or DW_OP_bit_piece. How a
producer generates a DWARF expression is a Quality of Implementation